index - Equipe Secure and Safe Hardware Accéder directement au contenu

 

Dernières publications

Mots clés

Magnetic tunneling Asynchronous Field programmable gate arrays SoC Convolution MRAM Tunneling magnetoresistance Side-Channel Analysis SCA Resistance Countermeasures Receivers Authentication SCA Side-Channel Analysis Sécurité Power demand CRT AES Signal processing algorithms Simulation Internet of Things STT-MRAM FPGA Steadiness Estimation GSM Lightweight cryptography Dual-rail with Precharge Logic DPL Intrusion detection Mutual Information Analysis MIA Masking Routing Formal methods Fault injection Filtering Field Programmable Gates Array FPGA Voltage Elliptic curve cryptography Random access memory FDSOI Linearity Defect modeling Sensors Writing Aging Power-constant logic Energy consumption Coq Side-channel attacks Robustness Side-channel attacks SCA Hardware security Protocols Countermeasure Security and privacy Security Transistors Cryptography TRNG Electromagnetic Formal proof Circuit faults Confusion coefficient DRAM OCaml Differential Power Analysis DPA Fault injection attack Reverse engineering Costs Switches RSA 3G mobile communication Security services Machine learning ASIC Computational modeling Information leakage Differential power analysis DPA Side-channel analysis Reverse-engineering PUF Side-channel attack Application-specific VLSI designs Masking countermeasure Process variation Variance-based Power Attack VPA Image processing Dynamic range Spin transfer torque Side-Channel Attacks Temperature sensors Randomness Logic gates CPA Magnetic tunnel junction Hardware Training Reliability Loop PUF Neural networks

 

Documents avec texte intégral

213

Références bibliographiques

428

Open access

Chargement de la page

Collaborations